TY - GEN
T1 - Work-in-Progress
T2 - 2018 ACM/IEEE International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2018
AU - Seo, Minjun
AU - Lysecky, Roman
N1 - Publisher Copyright:
© 2018 IEEE.
PY - 2018/11/6
Y1 - 2018/11/6
N2 - This paper presents a requirements-driven methodology enabling efficient runtime monitoring of hardware in embedded systems. We present a novel method for extracting hardware verification requirements from state-based hardware models to construct a hierarchical runtime monitoring graph (HRMG) that can be efficiently used at runtime to verify correctness.
AB - This paper presents a requirements-driven methodology enabling efficient runtime monitoring of hardware in embedded systems. We present a novel method for extracting hardware verification requirements from state-based hardware models to construct a hierarchical runtime monitoring graph (HRMG) that can be efficiently used at runtime to verify correctness.
KW - Runtime requirements verification
KW - formal verification models
KW - hardware verification
KW - non-intrusive monitoring
UR - http://www.scopus.com/inward/record.url?scp=85058245324&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85058245324&partnerID=8YFLogxK
U2 - 10.1109/CODESISSS.2018.8525882
DO - 10.1109/CODESISSS.2018.8525882
M3 - Conference contribution
AN - SCOPUS:85058245324
T3 - 2018 International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2018
BT - 2018 International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2018
PB - Institute of Electrical and Electronics Engineers Inc.
Y2 - 30 September 2018 through 5 October 2018
ER -