Warp processing: Dynamic translation of binaries to FPGA circuits

Frank Vahid; Greg Stitt; Roman Lysecky

doi:10.1109/MC.2008.240

Warp processing: Dynamic translation of binaries to FPGA circuits

Frank Vahid, Greg Stitt, Roman Lysecky

Research output: Contribution to specialist publication › Article

72 Scopus citations

Abstract

Warp processing dynamically and transparently transforms an executing microprocessor's binary kernels into customized field-programmable gate array (FPGA) circuits, commonly resulting in 2X to 100X speedup over executing on microprocessors. A new architecture and set of dynamic CAD tools demonstrate warp processing's potential.

Original language	English (US)
Pages	40-46
Number of pages	7
Volume	41
No	7
Specialist publication	Computer
DOIs	https://doi.org/10.1109/MC.2008.240
State	Published - Jul 2008
Externally published	Yes

Keywords

Dynamic synthesis
Embedded systems
FPGA
Just-in-time compilation
Reconfigurable computing
Warp processing

ASJC Scopus subject areas

General Computer Science

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10.1109/MC.2008.240

Cite this

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title = "Warp processing: Dynamic translation of binaries to FPGA circuits",

abstract = "Warp processing dynamically and transparently transforms an executing microprocessor's binary kernels into customized field-programmable gate array (FPGA) circuits, commonly resulting in 2X to 100X speedup over executing on microprocessors. A new architecture and set of dynamic CAD tools demonstrate warp processing's potential.",

keywords = "Dynamic synthesis, Embedded systems, FPGA, Just-in-time compilation, Reconfigurable computing, Warp processing",

author = "Frank Vahid and Greg Stitt and Roman Lysecky",

year = "2008",

month = jul,

doi = "10.1109/MC.2008.240",

language = "English (US)",

volume = "41",

pages = "40--46",

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publisher = "IEEE Computer Society",

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N2 - Warp processing dynamically and transparently transforms an executing microprocessor's binary kernels into customized field-programmable gate array (FPGA) circuits, commonly resulting in 2X to 100X speedup over executing on microprocessors. A new architecture and set of dynamic CAD tools demonstrate warp processing's potential.

AB - Warp processing dynamically and transparently transforms an executing microprocessor's binary kernels into customized field-programmable gate array (FPGA) circuits, commonly resulting in 2X to 100X speedup over executing on microprocessors. A new architecture and set of dynamic CAD tools demonstrate warp processing's potential.

KW - Dynamic synthesis

KW - Embedded systems

KW - FPGA

KW - Just-in-time compilation

KW - Reconfigurable computing

KW - Warp processing

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Warp processing: Dynamic translation of binaries to FPGA circuits

Abstract

Keywords

ASJC Scopus subject areas

Access to Document

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