Abstract
EPIC (Explicitly Parallel Instruction Computing) architectures, exemplified by the Intel Itanium, support a number of advanced architectural features, such as explicit instruction-level parallelism, instruction predication, and speculative loads from memory. However, compiler optimizations to take advantage of such architectural features can profoundly restructure the program's code, making it potentially difficult to reconstruct the original program logic from an optimized Itanium executable. This paper describes techniques to undo some of the effects of such optimizations and thereby improve the quality of reverse engineering such executables.
| Original language | English (US) |
|---|---|
| Pages | 4-13 |
| Number of pages | 10 |
| DOIs | |
| State | Published - 2003 |
| Event | Tenth Working Conference on Reverse Engineering - Victoria, BC, Canada Duration: Nov 13 2003 → Nov 16 2003 |
Conference
| Conference | Tenth Working Conference on Reverse Engineering |
|---|---|
| Country/Territory | Canada |
| City | Victoria, BC |
| Period | 11/13/03 → 11/16/03 |
ASJC Scopus subject areas
- General Engineering
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