TY - JOUR
T1 - Thermal oxide patterning method for compensating coating stress in silicon substrates
AU - Yao, Youwei
AU - Chalifoux, Brandon D.
AU - Heilmann, Ralf K.
AU - Schattenburg, Mark L.
N1 - Funding Information:
Goddard Space Flight Center; National Aeronautics and Space Administration (NASA) (NNX17AE47G). The authors thank William W. Zhang at NASA Goddard Space Flight Center (GSFC) and Lester Cohen of the Harvard-Smithsonian Astrophysical Observatory (SAO) for useful discussions. The authors also thank Kurt A. Broderick at Microsystems Technology Laboratories (MTL) at MIT for helpful discussions and suggestions, and MTL for facilities support.
Publisher Copyright:
© 2019 Optical Society of America
PY - 2019/1/21
Y1 - 2019/1/21
N2 - We introduce a novel method for correcting distortion in thin silicon substrates caused by coating stress. Thin substrates, such as lightweight mirrors for x-ray or optical imaging, and semiconductor wafers or flat panel substrates, are easily distorted by stress in thin film coatings. We report a new method for correcting stress-induced distortion in flat silicon substrates which utilizes a micro-patterned silicon oxide layer on the back side of the substrate. Due to the excellent lithographic precision of the patterning process, we demonstrate stress compensation control to a precision of ~0.2%. The proposed process is simple and inexpensive due to the relatively large pattern features on the photomask. The correction process has been tested on flat silicon wafers that were distorted by 30 nm-thick compressively-stressed coatings of chromium, achieving RMS surface height and slope error reductions of a factor of 68 and 50, respectively.
AB - We introduce a novel method for correcting distortion in thin silicon substrates caused by coating stress. Thin substrates, such as lightweight mirrors for x-ray or optical imaging, and semiconductor wafers or flat panel substrates, are easily distorted by stress in thin film coatings. We report a new method for correcting stress-induced distortion in flat silicon substrates which utilizes a micro-patterned silicon oxide layer on the back side of the substrate. Due to the excellent lithographic precision of the patterning process, we demonstrate stress compensation control to a precision of ~0.2%. The proposed process is simple and inexpensive due to the relatively large pattern features on the photomask. The correction process has been tested on flat silicon wafers that were distorted by 30 nm-thick compressively-stressed coatings of chromium, achieving RMS surface height and slope error reductions of a factor of 68 and 50, respectively.
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U2 - 10.1364/OE.27.001010
DO - 10.1364/OE.27.001010
M3 - Article
C2 - 30696174
AN - SCOPUS:85060170412
VL - 27
SP - 1010
EP - 1024
JO - Optics Express
JF - Optics Express
SN - 1094-4087
IS - 2
ER -