Abstract
This work focuses on the different mechanisms of impurity transport and distribution in process equipment, with particular emphasis on moisture distribution in vertical thermal reactors. The results are important in both control and metrology of gaseous impurities during startup and process cycles. In addition to direct measurements, a comprehensive theoretical model is developed which is useful for process parametric study to optimize the process parameters or improve the reactor design. The results show that the impurity purge during startup is controlled by the diffusion in the wafer spacing; this diffusion becomes a bottleneck for large wafers and high furnace loading. The major sources of impurities during the wafer introduction (wafer push) stage are backdiffusion, impurity diffusion from the wafer spacing and outgassing of wafers as they enter the reactor. The primary sources during operation are permeation through the quartz reactor walls and leakage, together with backdiffusion, from the furnace outlet gaskets. A constant source of impurity is permeation through the polymeric tubing and fittings commonly used on the inlet side of the furnace. The kinetics and the mechanisms of each of these sources are determined through a combination of experimental measurements and process simulation.
Original language | English (US) |
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Pages (from-to) | 312-319 |
Number of pages | 8 |
Journal | IEEE Transactions on Semiconductor Manufacturing |
Volume | 9 |
Issue number | 3 |
DOIs | |
State | Published - 1996 |
ASJC Scopus subject areas
- Electronic, Optical and Magnetic Materials
- Condensed Matter Physics
- Industrial and Manufacturing Engineering
- Electrical and Electronic Engineering