Abstract
An emerging class of Field-Programmable Gate Arrays (FPGAs) permits partial reconfiguration of the device without disturbing the rest of the array - even while the device is operating. Dynamic device reconfiguration allows novel approaches to the migration of algorithms from software to hardware. New simulation tools are required in order to fully exploit the FPGA's versatility. We demonstrate how FPGA cells can be programmed and reprogrammed to provide a virtual FPGA that is much larger than the physical FPGA. In the context of dependable computing, our FPGA-based approach shows promise of significant performance gains over traditional software-intensive approaches. We apply this capability to the enhancement of software fault tolerance.
Original language | English (US) |
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Pages (from-to) | 39-42 |
Number of pages | 4 |
Journal | Proceedings of the IEEE Great Lakes Symposium on VLSI |
State | Published - 1996 |
Externally published | Yes |
Event | Proceedings of the 1996 6th Great Lakes Symposium on VLSI, GLSVLSI - Ames, IA, USA Duration: Mar 22 1996 → Mar 23 1996 |
ASJC Scopus subject areas
- Electrical and Electronic Engineering