TY - GEN
T1 - ROBUST
T2 - 4th International Workshop on Network on Chip Architectures, NoCArc 2011, in Conjunction with the 44th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO44
AU - Collet, Jacques Henri
AU - Louri, Ahmed
AU - Bhat, Vivek Tulsidas
AU - Poluri, Pavan
PY - 2011
Y1 - 2011
N2 - This work addresses the general problem of making Network-on-Chips (NoCs) routers totally self-healing in massively defective technologies. There are three main contributions. First, we propose a new hardware approach based on Built-In Self-Test techniques and multi-functional blocks (called Universal Logic Blocks, ULBs) to autonomously diagnose permanent faults and repair faulty units. ULBs have the capability to assume the functionality of various functional units within the router through simple reconfiguration and thus enable the repair of multiple permanent faults within the NoC router. Second, we propose a new reliability metric and introduce a probabilistic model to estimate the router reliability improvement achieved by the protection circuitry. Third, we compare our architecture to two router architectures (Vicis and Bulletproof) and we show that our design provides superior reliability improvement especially in extremely defective nanoscale technologies (i.e., typically above 30% of faulty routers). The most striking result is that the self-healing of the routers enables maintaining the communications at fault levels, where it is normally impossible to preserve communications.
AB - This work addresses the general problem of making Network-on-Chips (NoCs) routers totally self-healing in massively defective technologies. There are three main contributions. First, we propose a new hardware approach based on Built-In Self-Test techniques and multi-functional blocks (called Universal Logic Blocks, ULBs) to autonomously diagnose permanent faults and repair faulty units. ULBs have the capability to assume the functionality of various functional units within the router through simple reconfiguration and thus enable the repair of multiple permanent faults within the NoC router. Second, we propose a new reliability metric and introduce a probabilistic model to estimate the router reliability improvement achieved by the protection circuitry. Third, we compare our architecture to two router architectures (Vicis and Bulletproof) and we show that our design provides superior reliability improvement especially in extremely defective nanoscale technologies (i.e., typically above 30% of faulty routers). The most striking result is that the self-healing of the routers enables maintaining the communications at fault levels, where it is normally impossible to preserve communications.
KW - fault-tolerance
KW - multi-core architectures
KW - network-on-chip
KW - self-healing
UR - http://www.scopus.com/inward/record.url?scp=84855302363&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84855302363&partnerID=8YFLogxK
U2 - 10.1145/2076501.2076504
DO - 10.1145/2076501.2076504
M3 - Conference contribution
AN - SCOPUS:84855302363
SN - 9781450309479
T3 - ACM International Conference Proceeding Series
SP - 11
EP - 16
BT - 4th International Workshop on Network on Chip Architectures, NoCArc 2011 - In Conjunction with the 44th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO-44
Y2 - 4 December 2011 through 4 December 2011
ER -