TY - GEN
T1 - Resource efficient real-time processing of Contrast Limited Adaptive Histogram Equalization
AU - Unal, Burak
AU - Akoglu, Ali
N1 - Publisher Copyright:
© 2016 EPFL.
PY - 2016/9/26
Y1 - 2016/9/26
N2 - Contextual Contrast Limited Adaptive Histogram Equalization (C-CLAHE) is an effective method for solving the noise amplification effect of the adaptive histogram equalization (AHE), and enhancing the visibility of local details of an image. Even though C-CLAHE has a smaller memory foot print than CLAHE, complexity of the interpolation process increases the computation demand dramatically. Therefore, FPGA based implementations have been limited to CLAHE only. In this study we introduce three key modifications to the C-CLAHE, and for the first time make it feasible to implement on a resource limited FPGA. We restructure the method so that the histogram redistribution stage is realized with fewer number of iterations. We implement contrast limitation calculations earlier during the histogram generation stage instead of during the histogram redistribution stage, which reduces the block RAM demand. We finally mathematically derive an alternative interpolation calculation used during the remapping stage, which reduces the computation complexity in terms of required multipliers by a factor of 2×, without sacrificing the image quality. These algorithmic modifications allowed us to reduce the block RAM demand by a factor of 12×, logic block demand by a factor of 6.7× compared to the state of the art FPGA based CLAHE implementation, and achieve real time processing of 640 × 480 images at a rate of 354 frames per second.
AB - Contextual Contrast Limited Adaptive Histogram Equalization (C-CLAHE) is an effective method for solving the noise amplification effect of the adaptive histogram equalization (AHE), and enhancing the visibility of local details of an image. Even though C-CLAHE has a smaller memory foot print than CLAHE, complexity of the interpolation process increases the computation demand dramatically. Therefore, FPGA based implementations have been limited to CLAHE only. In this study we introduce three key modifications to the C-CLAHE, and for the first time make it feasible to implement on a resource limited FPGA. We restructure the method so that the histogram redistribution stage is realized with fewer number of iterations. We implement contrast limitation calculations earlier during the histogram generation stage instead of during the histogram redistribution stage, which reduces the block RAM demand. We finally mathematically derive an alternative interpolation calculation used during the remapping stage, which reduces the computation complexity in terms of required multipliers by a factor of 2×, without sacrificing the image quality. These algorithmic modifications allowed us to reduce the block RAM demand by a factor of 12×, logic block demand by a factor of 6.7× compared to the state of the art FPGA based CLAHE implementation, and achieve real time processing of 640 × 480 images at a rate of 354 frames per second.
KW - FPGA
KW - histogram equalization
KW - image enhancement
KW - medical imaging
KW - memory efficient
UR - http://www.scopus.com/inward/record.url?scp=84994845415&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84994845415&partnerID=8YFLogxK
U2 - 10.1109/FPL.2016.7577362
DO - 10.1109/FPL.2016.7577362
M3 - Conference contribution
AN - SCOPUS:84994845415
T3 - FPL 2016 - 26th International Conference on Field-Programmable Logic and Applications
BT - FPL 2016 - 26th International Conference on Field-Programmable Logic and Applications
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 26th International Conference on Field-Programmable Logic and Applications, FPL 2016
Y2 - 29 August 2016 through 2 September 2016
ER -