RAPID for high-performance computing systems: Architecture and performance evaluation

The limited bandwidth and the increase in power dissipation at longer communication distances and higher bit rates will create a major communication bottleneck in high-performance computing systems (HPCS), affecting not only their performance, but also their scalability. As a solution, we propose an optical-interconnect-based architecture for HPCS called reconfigurable all-photonic interconnect for parallel and distributed systems (RAPID) that alleviates the bandwidth density, optimizes power consumption, and enhances scalability. We also present two cost-effective design alternatives of the architecture, a modified version called M-RAPID and an extended version called E-RAPID that minimizes the cost of the interconnect based on the number of transmitters required. We perform a detailed simulation of the proposed RAPID architecture and compare it to several electrical HPCS interconnects. Based on the performance study, RAPID architecture shows 30%-50% increased throughput and 50%-75% reduced network latency as compared to HPCS electrical networks.