Profile assisted online system-level performance and power estimation for dynamic reconfigurable embedded systems

Jingqing Mu, Roman Lysecky

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Scopus citations

Abstract

Significant research has demonstrated the performance and power benefits of runtime dynamic reconfiguration of FPGAs and microprocessor/FPGA devices. For dynamically reconfigurable systems, in which the selection of hardware coprocessors to implement within the FPGA is determined at runtime, online estimation methods are needed to evaluate the performance and power consumption impact of the hardware coprocessor selection. In this paper, we present a profile assisted online system-level performance and power estimation framework for estimating the speedup and power consumption of dynamically reconfigurable embedded systems. We evaluate the accuracy and fidelity of our online estimation framework for dynamic hardware kernel selection to maximize performance or minimize system power consumption.

Original languageEnglish (US)
Title of host publication2011 16th Asia and South Pacific Design Automation Conference, ASP-DAC 2011
Pages737-742
Number of pages6
DOIs
StatePublished - 2011
Event2011 16th Asia and South Pacific Design Automation Conference, ASP-DAC 2011 - Yokohama, Japan
Duration: Jan 25 2011Jan 28 2011

Publication series

NameProceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Other

Other2011 16th Asia and South Pacific Design Automation Conference, ASP-DAC 2011
Country/TerritoryJapan
CityYokohama
Period1/25/111/28/11

ASJC Scopus subject areas

  • Computer Science Applications
  • Computer Graphics and Computer-Aided Design
  • Electrical and Electronic Engineering

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