Power and energy consumption are seen of one of the most critical design factor for any next generation large-scale HPC system. The price centers have to pay for energy is shifting the budgets from investment to operating costs, leading to scenarios in which the sizes of systems will be determined by their power needs, rather by the initial hardware cost. As a consequence, virtually all funding agencies for HPC projects around the world have set aggressive goals for peak power requirements in future machines. Yet, with today's HPC architectures and systems, these goals are still far out of reach: they will only be achievable through a complex set of mechanisms at all levels of hardware and software, from buildings and infrastructure to software control and all the way to microarchitectural solutions. All of these mechanisms will ultimately impact the application developer. On future HPC systems, running a code efficiently (as opposed to purely with high performance) will be a major requirement for every user. This work accompanies the tutorial 'Power Aware High Performance Computing: Challenges and Opportunities for Application and system Developers' and captures the key aspects discussed. We will review existing literature to discuss the challenges caused by power and energy constraints, present available approaches in hardware and software, highlight impacts on HPC center and infrastructure design as well as operations, and ultimately show how this shift in paradigm from 'cycle awareness' to 'power awareness' will impact application development.