PhLock: A cache energy saving technique using phase-based cache locking

Tosiron Adegbija, Ann Gordon-Ross

Research output: Contribution to journalArticlepeer-review

8 Scopus citations


Caches are commonly used to bridge the processormemory performance gap in embedded systems. Since embedded systems typically have stringent design constraints imposed by physical size, battery capacity, and real-time deadlines much research focuses on cache optimizations, such as improved performance and/or reduced energy consumption. Cache locking is a popular cache optimization that loads and retains/locks selected memory contents from an executing application into the cache to increase the cache's predictability. Previous work has shown that cache locking also has the potential to improve cache energy consumption. In this paper, we introduce phasebased cache locking, PhLock, which leverages an application's varying runtime characteristics to dynamically select the locked memory contents to optimize cache energy consumption. Using a variety of applications from the SPEC2006 and MiBench benchmark suites, experimental results show that PhLock is promising for reducing both the instruction and data caches' energy consumption. As compared to a nonlocking cache, PhLock reduced the instruction and data cache energy consumption by an average of 5% and 39%, respectively, for SPEC2006 applications, and by 75% and 14%, respectively, for MiBench benchmarks.

Original languageEnglish (US)
Pages (from-to)110-121
Number of pages12
JournalIEEE Transactions on Very Large Scale Integration (VLSI) Systems
Issue number1
StatePublished - Jan 2018


  • Adaptable computing
  • Cache locking
  • Configurable caches
  • Dynamic optimization
  • Energy savings
  • Low-power embedded systems
  • Persistent phases
  • Phase-based tuning

ASJC Scopus subject areas

  • Software
  • Hardware and Architecture
  • Electrical and Electronic Engineering


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