Parallel implementation of the Hopfield network on GAPP processors

George M. Papadourakis, Greg L. Heileman, Michael Georgiopoulos

Research output: Contribution to conferencePaperpeer-review

3 Scopus citations

Abstract

Summary form only given, as follows. A parallel hardware implementation of the popular Hopfield neural network is described. The design utilizes the geometric arithmetic parallel processor (GAPP), an SIMD machine consisting of 72 processing elements. Memory requirements and processing times are analyzed based upon the number of nodes in the network and the number of exemplar patterns. Compared with other digital implementations, this design yields significant improvements in runtime performance.

Original languageEnglish (US)
Pages582
Number of pages1
StatePublished - 1989
Externally publishedYes
EventIJCNN International Joint Conference on Neural Networks - Washington, DC, USA
Duration: Jun 18 1989Jun 22 1989

Other

OtherIJCNN International Joint Conference on Neural Networks
CityWashington, DC, USA
Period6/18/896/22/89

ASJC Scopus subject areas

  • Engineering(all)

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