TY - GEN
T1 - OWN
T2 - 23rd IEEE Annual Symposium on High-Performance Interconnects, HOTI 2015
AU - Sikder, Md Ashif I.
AU - Kodi, Avinash K.
AU - Kennedy, Matthew
AU - Kaya, Savas
AU - Louri, Ahmed
N1 - Publisher Copyright:
© 2015 IEEE.
PY - 2015/10/29
Y1 - 2015/10/29
N2 - As technology scaling is already enabling the integration of tens of hundreds of cores on a single chip, kilo-core chip multiprocessors (CMPs) are expected to be available within a decade. However, metallic-based on-chip interconnects may not scale to support kilo-core architectures due to increased hop count, high power dissipation, and increased latency. Emerging technologies such as silicon-photonics and wireless interconnects are under serious consideration as they show promising results for power-efficient, low-latency, and scalable on-chip interconnects. However, photonic technology suffers from scalability issues due to high component cost and complex arbitration while wireless technology lacks sufficient bandwidth for on-chip communication. In this paper, we propose an architecture called Optical-Wireless Network-on-Chip (OWN) that leverages the advantages of wireless and photonic technologies while circumventing the disadvantages of these two emerging technologies. Kilo-core OWN is designed such that one-hop photonic interconnect is used up to 64 cores (called a cluster). For communication beyond a cluster, one-hop wireless interconnect is proposed to enhance scalability. Both wireless and photonic bandwidths are efficiently shared using time division multiplexing (TDM). Moreover, packets routed across technologies are guaranteed to be deadlock-free. Our area results indicate that OWN requires 34% more area than hybrid-wireless architectures and 35.5% less area than photonic architectures. The energy/bit for OWN is 30.36% less than wireless and 13.99% more than photonic architecture. OWN demonstrates higher saturation throughput when compared to wired, wireless, and photonic technologies for synthetic network traffic.
AB - As technology scaling is already enabling the integration of tens of hundreds of cores on a single chip, kilo-core chip multiprocessors (CMPs) are expected to be available within a decade. However, metallic-based on-chip interconnects may not scale to support kilo-core architectures due to increased hop count, high power dissipation, and increased latency. Emerging technologies such as silicon-photonics and wireless interconnects are under serious consideration as they show promising results for power-efficient, low-latency, and scalable on-chip interconnects. However, photonic technology suffers from scalability issues due to high component cost and complex arbitration while wireless technology lacks sufficient bandwidth for on-chip communication. In this paper, we propose an architecture called Optical-Wireless Network-on-Chip (OWN) that leverages the advantages of wireless and photonic technologies while circumventing the disadvantages of these two emerging technologies. Kilo-core OWN is designed such that one-hop photonic interconnect is used up to 64 cores (called a cluster). For communication beyond a cluster, one-hop wireless interconnect is proposed to enhance scalability. Both wireless and photonic bandwidths are efficiently shared using time division multiplexing (TDM). Moreover, packets routed across technologies are guaranteed to be deadlock-free. Our area results indicate that OWN requires 34% more area than hybrid-wireless architectures and 35.5% less area than photonic architectures. The energy/bit for OWN is 30.36% less than wireless and 13.99% more than photonic architecture. OWN demonstrates higher saturation throughput when compared to wired, wireless, and photonic technologies for synthetic network traffic.
KW - Optical fiber communication
KW - Optical modulation
KW - Optical transmitters
KW - Optical waveguides
KW - Photonics
KW - System recovery
KW - Wireless communication
UR - http://www.scopus.com/inward/record.url?scp=84962262567&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84962262567&partnerID=8YFLogxK
U2 - 10.1109/HOTI.2015.14
DO - 10.1109/HOTI.2015.14
M3 - Conference contribution
AN - SCOPUS:84962262567
T3 - Proceedings - 2015 IEEE 23rd Annual Symposium on High-Performance Interconnects, HOTI 2015
SP - 44
EP - 51
BT - Proceedings - 2015 IEEE 23rd Annual Symposium on High-Performance Interconnects, HOTI 2015
PB - Institute of Electrical and Electronics Engineers Inc.
Y2 - 26 August 2015 through 28 August 2015
ER -