Abstract
While Boolean logic minimization is typically used in logic synthesis, logic minimization can be useful in numerous other applications. However, many of those applications, such as Internet Protocol routing table and network access control list reduction, require logic minimization during the application's runtime, and hence could benefit from minimization executing on-chip alongside the application. On-chip minimization can even enable dynamic hardware/software partitioning. We discuss requirements of on-chip logic minimization, and present our new on-chip logic minimization tool, ROCM. We compare with the well-known Espresso logic minimizer and show that ROCM is 10 times smaller, executes 10-20 times faster, and uses 3 times less data memory, with a mere 2% quality penalty, for the routing table and access control list applications. We show that ROCM solves real-sized problems on an ARM7 embedded processor in just seconds.
Original language | English (US) |
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Pages (from-to) | 334-337 |
Number of pages | 4 |
Journal | Proceedings - Design Automation Conference |
DOIs | |
State | Published - 2003 |
Event | Proceedings of the 40th Design Automation Conference - Anaheim, CA, United States Duration: Jun 2 2003 → Jun 6 2003 |
Keywords
- Dynamic optimization
- Embedded systems
- Logic minimization
- On-chip logic minimization
- On-chip synthesis
- System-on-a-chip
ASJC Scopus subject areas
- Hardware and Architecture
- Control and Systems Engineering