Multilevel testing for design verification of embedded systems

Stephan Schulz; Jerzy W. Rozenblit; Klaus J. Buchenrieder

doi:10.1109/54.990443

Multilevel testing for design verification of embedded systems

Stephan Schulz, Jerzy W. Rozenblit, Klaus J. Buchenrieder

Research output: Contribution to journal › Article › peer-review

13 Scopus citations

Abstract

A multilevel testing approach for embedded systems addresses mixed hardware and software implementations. In particular, this approach called the model-based codesign uses system modeling to prototype systems under design. Contrary to conventional approaches, it provides consistent generation of scenarios throughout all levels of testing, an early assessment of alternative design implementations, integrated system and component testing, and performance assessments of design specifications starting from the system level.

Original language	English (US)
Pages (from-to)	60-69
Number of pages	10
Journal	IEEE Design and Test of Computers
Volume	19
Issue number	2
DOIs	https://doi.org/10.1109/54.990443
State	Published - Mar 2002

ASJC Scopus subject areas

Software
Hardware and Architecture
Electrical and Electronic Engineering

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10.1109/54.990443

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title = "Multilevel testing for design verification of embedded systems",

abstract = "A multilevel testing approach for embedded systems addresses mixed hardware and software implementations. In particular, this approach called the model-based codesign uses system modeling to prototype systems under design. Contrary to conventional approaches, it provides consistent generation of scenarios throughout all levels of testing, an early assessment of alternative design implementations, integrated system and component testing, and performance assessments of design specifications starting from the system level.",

author = "Stephan Schulz and Rozenblit, {Jerzy W.} and Buchenrieder, {Klaus J.}",

note = "Funding Information: This work has been supported by the research laboratories of Infineon Technologies/Siemens, Munich. We thank Altera Corp. for providing an Altera ISP demo board and development software for the development of the AICC system prototype. We also thank Steve J. Cunning and Sanjaya K. Wijeratne for their help with the implementation of this project.",

year = "2002",

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AU - Rozenblit, Jerzy W.

AU - Buchenrieder, Klaus J.

N1 - Funding Information: This work has been supported by the research laboratories of Infineon Technologies/Siemens, Munich. We thank Altera Corp. for providing an Altera ISP demo board and development software for the development of the AICC system prototype. We also thank Steve J. Cunning and Sanjaya K. Wijeratne for their help with the implementation of this project.

PY - 2002/3

Y1 - 2002/3

N2 - A multilevel testing approach for embedded systems addresses mixed hardware and software implementations. In particular, this approach called the model-based codesign uses system modeling to prototype systems under design. Contrary to conventional approaches, it provides consistent generation of scenarios throughout all levels of testing, an early assessment of alternative design implementations, integrated system and component testing, and performance assessments of design specifications starting from the system level.

AB - A multilevel testing approach for embedded systems addresses mixed hardware and software implementations. In particular, this approach called the model-based codesign uses system modeling to prototype systems under design. Contrary to conventional approaches, it provides consistent generation of scenarios throughout all levels of testing, an early assessment of alternative design implementations, integrated system and component testing, and performance assessments of design specifications starting from the system level.

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Multilevel testing for design verification of embedded systems

Abstract

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