Abstract
Currently, the Computer-Aided Engineering (CAE) environments for designing Field-Programmable Gate Arrays (FPGAs) do not support the simulation of FPGA reprogrammability, hence prototyping of adaptive systems relies upon using the actual FPGAs. The FPGA architecture baselined in this paper, similar to a commercially-available FPGA architecture, supports partial reconfiguration without disturbing the rest of the array. In this paper, we describe a modeling strategy for obtaining VHDL descriptions of versatile FPGAs so their dynamic behavior can be exhibited in advance of device procurement. An adaptive system using a versatile FPGA may also be prototyped with an emulation system whose FPGAs are architecturally different from the one requiring emulation. VHDL structural descriptions of the prototype's FPGA demonstrate the feasibility of transferring the model to the emulation system. We show how the generation of both the model and the simulation input capture the FPGA's full versatility.
Original language | English (US) |
---|---|
Pages (from-to) | 174-180 |
Number of pages | 7 |
Journal | Proceedings of the International Workshop on Rapid System Prototyping |
State | Published - 1995 |
Externally published | Yes |
Event | Proceedings of the 6th IEEE International Workshop on Rapid System Prototyping - Chapel Hill, NC, USA Duration: Jun 7 1995 → Jun 9 1995 |
ASJC Scopus subject areas
- General Computer Science