Metrics and models for reordering transformations

Michelle Mills Strout, Paul D. Hovland

Research output: Chapter in Book/Report/Conference proceedingConference contribution

30 Scopus citations

Abstract

Irregular applications frequently exhibit poor performance on contemporary computer architectures, in large part because of their inefficient use of the memory hierarchy. Run-time data, and iteration-reordering transformations have been shown to improve the locality and therefore the performance of irregular benchmarks. This paper describes models for determining which combination of run-time data- and iteration-reordering heuristics will result in the best performance for a given dataset. We propose that the data- and iteration-reordering transformations be viewed as approximating minimal linear arrangements on two separate hypergraphs: a spatial locality hypergraph and a temporal locality hypergraph. Our results measure the efficacy of locality metrics based on these hypergraphs in guiding the selection of data-and iteration-reordering heuristics. We also introduce new iteration- and data-reordering heuristics based on the hypergraph models that result in better performance than do previous heuristics.

Original languageEnglish (US)
Title of host publicationProceedings of the ACM SIGPLAN Workshop on Memory System Performance, MSP 2004
Pages23-34
Number of pages12
DOIs
StatePublished - 2004
Externally publishedYes
Event2nd ACM SIGPLAN Workshop on Memory Systems Performance, MSP 2004 - Washington, DC, United States
Duration: Jun 8 2004Jun 8 2004

Publication series

NameProceedings of the ACM SIGPLAN Workshop on Memory System Performance, MSP 2004

Conference

Conference2nd ACM SIGPLAN Workshop on Memory Systems Performance, MSP 2004
Country/TerritoryUnited States
CityWashington, DC
Period6/8/046/8/04

Keywords

  • Data locality
  • Inspector/executor
  • Locality metrics
  • Optimization
  • Run-time reordering transformations
  • Spatial locality graph
  • Temporal locality hypergraph

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

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