Low level watermarking of VLSI designs for intellectual property protection

David L. Irby; Rexford D. Newbould; Jo Dale Carothers; Jeffrey J. Rodriguez; W. Timothy Holman

Low level watermarking of VLSI designs for intellectual property protection

David L. Irby
, Rexford D. Newbould
, Jo Dale Carothers
, Jeffrey J. Rodriguez
, W. Timothy Holman

Research output: Contribution to journal › Conference article › peer-review

Abstract

We propose a method for watermarking, called `fingermarking,' for integrated circuit design at the physical design level. The watermark is embedded in the transistor layout, making our method applicable to digital, analog, and mixed-signal SOC designs. We show that a robust watermark can be applied to many designs, and can be implemented with little or no cost in circuit area or performance.

Original language	English (US)
Pages (from-to)	136-140
Number of pages	5
Journal	Proceedings of the Annual IEEE International ASIC Conference and Exhibit
State	Published - 2000
Event	Proceedings of the 13th Annual IEEE International ASIC/SOC Conference - Arlington, VA, USA Duration: Sep 13 2000 → Sep 16 2000

ASJC Scopus subject areas

Electrical and Electronic Engineering

Cite this

@article{f67ceb8637b84058927b907119b62792,

title = "Low level watermarking of VLSI designs for intellectual property protection",

abstract = "We propose a method for watermarking, called `fingermarking,' for integrated circuit design at the physical design level. The watermark is embedded in the transistor layout, making our method applicable to digital, analog, and mixed-signal SOC designs. We show that a robust watermark can be applied to many designs, and can be implemented with little or no cost in circuit area or performance.",

author = "Irby, \{David L.\} and Newbould, \{Rexford D.\} and Carothers, \{Jo Dale\} and Rodriguez, \{Jeffrey J.\} and Holman, \{W. Timothy\}",

year = "2000",

language = "English (US)",

pages = "136--140",

journal = "Proceedings of the Annual IEEE International ASIC Conference and Exhibit",

issn = "1063-0988",

note = "Proceedings of the 13th Annual IEEE International ASIC/SOC Conference ; Conference date: 13-09-2000 Through 16-09-2000",

}

TY - JOUR

T1 - Low level watermarking of VLSI designs for intellectual property protection

AU - Irby, David L.

AU - Newbould, Rexford D.

AU - Carothers, Jo Dale

AU - Rodriguez, Jeffrey J.

AU - Holman, W. Timothy

PY - 2000

Y1 - 2000

N2 - We propose a method for watermarking, called `fingermarking,' for integrated circuit design at the physical design level. The watermark is embedded in the transistor layout, making our method applicable to digital, analog, and mixed-signal SOC designs. We show that a robust watermark can be applied to many designs, and can be implemented with little or no cost in circuit area or performance.

AB - We propose a method for watermarking, called `fingermarking,' for integrated circuit design at the physical design level. The watermark is embedded in the transistor layout, making our method applicable to digital, analog, and mixed-signal SOC designs. We show that a robust watermark can be applied to many designs, and can be implemented with little or no cost in circuit area or performance.

UR - https://www.scopus.com/pages/publications/0033680790

UR - https://www.scopus.com/pages/publications/0033680790#tab=citedBy

M3 - Conference article

AN - SCOPUS:0033680790

SN - 1063-0988

SP - 136

EP - 140

JO - Proceedings of the Annual IEEE International ASIC Conference and Exhibit

JF - Proceedings of the Annual IEEE International ASIC Conference and Exhibit

T2 - Proceedings of the 13th Annual IEEE International ASIC/SOC Conference

Y2 - 13 September 2000 through 16 September 2000

ER -

Low level watermarking of VLSI designs for intellectual property protection

Abstract

ASJC Scopus subject areas

Other files and links

Fingerprint

Cite this