TY - GEN
T1 - Linear-time, optimal code scheduling for delayed-load architectures
AU - Proebsting, Todd A.
AU - Fischer, Charles N.
N1 - Publisher Copyright:
© 1991 ACM.
PY - 1991/5/1
Y1 - 1991/5/1
N2 - A fast, optimal code scheduling algorithm for processors with a delayed load of 1 instruction cycle is described. The algorithm minimizes both execution time and register use and runs in time proportional to the size of the expression tree. Extensions that spill registers when too few are available are also presented. The algorithm also performs very well for delayed loads of greater than 1 instruction cycle. For machines with load delays greater than 1, bounds are given for the minimal number of registers needed for optimally evaluating an expression tree.
AB - A fast, optimal code scheduling algorithm for processors with a delayed load of 1 instruction cycle is described. The algorithm minimizes both execution time and register use and runs in time proportional to the size of the expression tree. Extensions that spill registers when too few are available are also presented. The algorithm also performs very well for delayed loads of greater than 1 instruction cycle. For machines with load delays greater than 1, bounds are given for the minimal number of registers needed for optimally evaluating an expression tree.
UR - http://www.scopus.com/inward/record.url?scp=33846525062&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=33846525062&partnerID=8YFLogxK
U2 - 10.1145/113445.113467
DO - 10.1145/113445.113467
M3 - Conference contribution
AN - SCOPUS:33846525062
SN - 0897914287
T3 - Proceedings of the ACM SIGPLAN Conference on Programming Language Design and Implementation (PLDI)
SP - 256
EP - 267
BT - Proceedings of the ACM SIGPLAN Conference on Programming Language Design and Implementation (PLDI)
PB - Association for Computing Machinery
T2 - 1991 ACM SIGPLAN 1991 Conference on Programming Language Design and Implementation, PLDI 1991
Y2 - 24 June 1991 through 28 June 1991
ER -