Integration of a CdTe interdigitated photoconductor with AlGaAs field-effect transistor

J. L. Filippozzi; F. Therez; D. Estève; M. Fallahi; D. Kendil; M. Da Silva; M. Barbe; G. Cohen-Solal

doi:10.1016/0022-0248(90)91124-9

Integration of a CdTe interdigitated photoconductor with AlGaAs field-effect transistor

J. L. Filippozzi, F. Therez, D. Estève, M. Fallahi, D. Kendil, M. Da Silva, M. Barbe, G. Cohen-Solal

Research output: Contribution to journal › Article › peer-review

11 Scopus citations

Abstract

A device associating a GaAs/GaAlAs heterojunction FET with a CdTe photoconductor is presented. FET optimization criteria yielding maximum transconductance have been determined and the C_gs/G_m ratio has been evaluated. The successive technological steps highlight the thermal compatibility of the method of fabrication. The dimensions of our transistor are as follows: 5 μm X 350 μm gate length and width respectively. The photoconductor with an area of 100 μm X 100 μm has three sets of interdigitated ohmic contacts with 10 μm spacing between the fingers. FET transconductance values over 25 mS/mm have been achieved. The integrated circuit presents a responsivity I_out/P_opt as high as 30 A/W while that of the photoconductor is 2 A/W at 4 V gate bias. The Hall measurement of the CdTe layer gives a mobility of 270 cm²/V·s at room temperature and a resistivity of 100 Ω cm.

Original language	English (US)
Pages (from-to)	1013-1017
Number of pages	5
Journal	Journal of Crystal Growth
Volume	101
Issue number	1-4
DOIs	https://doi.org/10.1016/0022-0248(90)91124-9
State	Published - Apr 1 1990
Externally published	Yes

ASJC Scopus subject areas

Condensed Matter Physics
Inorganic Chemistry
Materials Chemistry

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10.1016/0022-0248(90)91124-9

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title = "Integration of a CdTe interdigitated photoconductor with AlGaAs field-effect transistor",

abstract = "A device associating a GaAs/GaAlAs heterojunction FET with a CdTe photoconductor is presented. FET optimization criteria yielding maximum transconductance have been determined and the Cgs/Gm ratio has been evaluated. The successive technological steps highlight the thermal compatibility of the method of fabrication. The dimensions of our transistor are as follows: 5 μm X 350 μm gate length and width respectively. The photoconductor with an area of 100 μm X 100 μm has three sets of interdigitated ohmic contacts with 10 μm spacing between the fingers. FET transconductance values over 25 mS/mm have been achieved. The integrated circuit presents a responsivity Iout/Popt as high as 30 A/W while that of the photoconductor is 2 A/W at 4 V gate bias. The Hall measurement of the CdTe layer gives a mobility of 270 cm2/V·s at room temperature and a resistivity of 100 Ω cm.",

author = "Filippozzi, {J. L.} and F. Therez and D. Est{\`e}ve and M. Fallahi and D. Kendil and {Da Silva}, M. and M. Barbe and G. Cohen-Solal",

year = "1990",

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doi = "10.1016/0022-0248(90)91124-9",

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T1 - Integration of a CdTe interdigitated photoconductor with AlGaAs field-effect transistor

AU - Filippozzi, J. L.

AU - Therez, F.

AU - Estève, D.

AU - Fallahi, M.

AU - Kendil, D.

AU - Da Silva, M.

AU - Barbe, M.

AU - Cohen-Solal, G.

PY - 1990/4/1

Y1 - 1990/4/1

N2 - A device associating a GaAs/GaAlAs heterojunction FET with a CdTe photoconductor is presented. FET optimization criteria yielding maximum transconductance have been determined and the Cgs/Gm ratio has been evaluated. The successive technological steps highlight the thermal compatibility of the method of fabrication. The dimensions of our transistor are as follows: 5 μm X 350 μm gate length and width respectively. The photoconductor with an area of 100 μm X 100 μm has three sets of interdigitated ohmic contacts with 10 μm spacing between the fingers. FET transconductance values over 25 mS/mm have been achieved. The integrated circuit presents a responsivity Iout/Popt as high as 30 A/W while that of the photoconductor is 2 A/W at 4 V gate bias. The Hall measurement of the CdTe layer gives a mobility of 270 cm2/V·s at room temperature and a resistivity of 100 Ω cm.

AB - A device associating a GaAs/GaAlAs heterojunction FET with a CdTe photoconductor is presented. FET optimization criteria yielding maximum transconductance have been determined and the Cgs/Gm ratio has been evaluated. The successive technological steps highlight the thermal compatibility of the method of fabrication. The dimensions of our transistor are as follows: 5 μm X 350 μm gate length and width respectively. The photoconductor with an area of 100 μm X 100 μm has three sets of interdigitated ohmic contacts with 10 μm spacing between the fingers. FET transconductance values over 25 mS/mm have been achieved. The integrated circuit presents a responsivity Iout/Popt as high as 30 A/W while that of the photoconductor is 2 A/W at 4 V gate bias. The Hall measurement of the CdTe layer gives a mobility of 270 cm2/V·s at room temperature and a resistivity of 100 Ω cm.

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JO - Journal of Crystal Growth

JF - Journal of Crystal Growth

IS - 1-4

ER -

Integration of a CdTe interdigitated photoconductor with AlGaAs field-effect transistor

Abstract

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