High-performance, Energy-efficient, Fault-tolerant Network-on-Chip Design Using Reinforcement Learnin

Mathematics

• Network on chip 100%
• Energy Efficient 81%
• High Performance 64%
• Reinforcement 64%
• Fault-tolerant 63%
• Energy Efficiency 50%
• Error Detection 43%
• Hardware 36%
• Fault 34%
• Power Consumption 32%
• Design 31%
• Reinforcement Learning 30%
• Performance 29%
• Chip 25%
• Timing 23%
• Router 14%
• Dynamic Control 13%
• Fault Tolerance 13%
• Latency 13%
• Error Correction 13%
• Control Policy 13%
• Error Rate 11%
• Traffic 11%
• Architecture 11%
• Optimise 10%
• Trade-offs 10%
• Communication 9%
• Continue 8%
• Evaluation 7%
• Energy 6%
• Standards 5%

Engineering & Materials Science

• Network-on-chip 56%
• Reinforcement 39%
• Error detection 27%
• Energy efficiency 19%
• Reinforcement learning 16%
• Computer hardware 14%
• Electric power utilization 12%
• Error correction 8%
• Fault tolerance 8%
• Routers 7%
• Transistors 7%
• Wire 6%