FPGA-based burst-error performance analysis and optimization of regular and irregular SD-LDPC codes for 50G-PON and beyond

Mingwei Yang, Ziwen Pan, Ivan B. Djordjevic

Research output: Contribution to journalArticlepeer-review

11 Scopus citations

Abstract

We evaluate the burst-error performance of the regular low-density parity-check (LDPC) code and the irregular LDPC code that has been considered for ITU-T's 50G-PON standard via experimental measurements in FPGA. By using intra codeword interleaving and parity-check matrix rearrangement, we demonstrate that the BER performance can be improved under ∼44-ns-duration burst errors for 50-Gb/s upstream signals.

Original languageEnglish (US)
Pages (from-to)10936-10946
Number of pages11
JournalOptics Express
Volume31
Issue number6
DOIs
StatePublished - Mar 13 2023

ASJC Scopus subject areas

  • Atomic and Molecular Physics, and Optics

Fingerprint

Dive into the research topics of 'FPGA-based burst-error performance analysis and optimization of regular and irregular SD-LDPC codes for 50G-PON and beyond'. Together they form a unique fingerprint.

Cite this