Abstract
We propose a gradient descent type bit flipping algorithm for decoding low density parity check codes on the binary symmetric channel. Randomness introduced in the bit flipping rule makes this class of decoders not only superior to other decoding algorithms of this type, but also robust to logic-gate failures. We report a surprising discovery that for a broad range of gate failure probability our decoders actually benefit from faults in logic gates which serve as an inherent source of randomness and help the decoding algorithm to escape from local minima associated with trapping sets.
Original language | English (US) |
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Article number | 6868233 |
Pages (from-to) | 1487-1490 |
Number of pages | 4 |
Journal | IEEE Communications Letters |
Volume | 18 |
Issue number | 9 |
DOIs | |
State | Published - Sep 1 2014 |
Keywords
- Bit-flipping algorithm
- decoding by unreliable hardware
- fault-tolerance
- low-density parity check codes
ASJC Scopus subject areas
- Modeling and Simulation
- Computer Science Applications
- Electrical and Electronic Engineering