Fault-resilient decoders and memories made of unreliable components

Bane Vasić, Predrag Ivanis, Srdan Brkic, Vida Ravanmehr

Research output: Chapter in Book/Report/Conference proceedingConference contribution

12 Scopus citations

Abstract

In this paper we present our recent results on iterative Gallager B decoder made of unreliable logic gates. We show evidence that probabilistic behavior of a decoder due to unreliable components can be exploited to our advantage and lead to an improved performance and reduced hardware redundancy. We provide examples of such decoder behavior and give an explanation of this phenomenon using iterative decoding dynamics. Iterative decoding can be viewed as a recursive procedure for Bethe free energy function minimization, and the randomness in a message update may help the decoder to escape from local minima. The decoder operates in a stochastic fashion, but the random perturbations do not require any additional hardware as they are built-in the faulty hardware itself.

Original languageEnglish (US)
Title of host publication2015 Information Theory and Applications Workshop, ITA 2015 - Conference Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages136-142
Number of pages7
ISBN (Electronic)9781479971954
DOIs
StatePublished - Oct 27 2015
EventInformation Theory and Applications Workshop, ITA 2015 - San Diego, United States
Duration: Feb 1 2015Feb 6 2015

Publication series

Name2015 Information Theory and Applications Workshop, ITA 2015 - Conference Proceedings

Other

OtherInformation Theory and Applications Workshop, ITA 2015
Country/TerritoryUnited States
CitySan Diego
Period2/1/152/6/15

Keywords

  • Charge carrier processes
  • Logic gates
  • Yttrium

ASJC Scopus subject areas

  • Computer Science Applications
  • Information Systems

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