Evaluating HOWFSC algorithm implementations on embedded space processors

Implementing high-order wavefront sensing and control (HOWFSC) algorithms on future space telescopes will require significant computing power. To enable the mission of Habitable Worlds Observatory to directly image exoplanets, we need to improve our understanding of the available performance of radiation-hardened processors. In this work, we describe the testing setup we use to evaluate HOWFSC algorithms, including Electric Field Conjugation and optical modeling on embedded processors. This testing setup enables accurate performance characterization of spaceflight-relevant CPUs and FPGAs in support of HOWFSC algorithms. We interface the embedded processors with a software model of a telescope and coronagraph to perform processor-in-the-loop testing. With this setup, we can test a range of telescope and HOWFSC algorithm configurations that are relevant to the design of future space missions, illuminating the feasibility of in-space HOWFSC algorithm execution.