Enhancing system dependability with dynamically reconfigurable FPGAs

Kevin Kwiat, Warren Debany, Salim Hariri

Research output: Contribution to conferencePaperpeer-review


Configuring computing modules for fault-tolerant or parallel computing requires the presence of certain logical functions. Unavoidable tradeoffs between hardware and software implementations of these functions have created unfavorable attributes for designs. Branching and jumps in software allow only the immediately needed function to take up processing resources, but software cannot match the speed of performing the function in dedicated hardware. Hardware, however, is rigid and permanently embodying functions in it adds to the overhead (size, weight, and power) of the system. Simplifying the hardware to reduce this overhead only restricts how the modules can be configured during operation. Our architecture uses a dynamically reconfigurable Field-Programmable Gate Array (FPGA) to bring together the benefits of hardware and software while mitigating the costs of both. The resultant design supports fault tolerance and multiprocessing among computing modules flexibly and judiciously while accelerating application throughput.

Original languageEnglish (US)
Number of pages6
StatePublished - 1997
EventProceedings of the 1997 High-Assurance Systems Engineering Workshop, HASE - Washington, DC, USA
Duration: Aug 11 1997Aug 12 1997


OtherProceedings of the 1997 High-Assurance Systems Engineering Workshop, HASE
CityWashington, DC, USA

ASJC Scopus subject areas

  • General Engineering


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