Energy and performance analysis of sttram caches for mobile applications

Kyle Kuan, Tosiron Adegbija

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Scopus citations

Abstract

Spin-Transfer Torque RAMs (STTRAMs) have been shown to offer much promise for implementing emerging cache architectures. This paper studies the viability of STTRAM caches for mobile workloads from the perspective of energy and latency. Specifically, we explore the benefits of reduced retention STTRAM caches for mobile applications. We analyze the characteristics of mobile applications' cache blocks and how those characteristics dictate the appropriate retention time for mobile device caches. We show that due to their inherently interactive nature, mobile applications' execution characteristics-and hence, STTRAM cache design requirements-differ from other kinds of applications. We also explore various STTRAM cache designs in both single and multicore systems, and at different cache levels, that can efficiently satisfy mobile applications' execution requirements, in order to maximize energy savings without introducing substantial latency overhead.

Original languageEnglish (US)
Title of host publicationProceedings - 2019 IEEE 13th International Symposium on Embedded Multicore/Many-Core Systems-on-Chip, MCSoC 2019
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages257-264
Number of pages8
ISBN (Electronic)9781728148823
DOIs
StatePublished - Oct 2019
Externally publishedYes
Event13th IEEE International Symposium on Embedded Multicore/Many-Core Systems-on-Chip, MCSoC 2019 - Singapore, Singapore
Duration: Oct 1 2019Oct 4 2019

Publication series

NameProceedings - 2019 IEEE 13th International Symposium on Embedded Multicore/Many-Core Systems-on-Chip, MCSoC 2019

Conference

Conference13th IEEE International Symposium on Embedded Multicore/Many-Core Systems-on-Chip, MCSoC 2019
Country/TerritorySingapore
CitySingapore
Period10/1/1910/4/19

Keywords

  • Energy efficient
  • Mobile applications
  • Multicore processor
  • Non volatile memory
  • Performance analysis
  • Retention time
  • Spin-Transfer Torque RAM (STTRAM) cache

ASJC Scopus subject areas

  • Computer Networks and Communications
  • Hardware and Architecture
  • Electrical and Electronic Engineering
  • Control and Optimization

Fingerprint

Dive into the research topics of 'Energy and performance analysis of sttram caches for mobile applications'. Together they form a unique fingerprint.

Cite this