Design of a high-speed optical interconnect for scalable shared-memory multiprocessors

Avinash Karanth Kodi; Ahmed Louri

doi:10.1109/MM.2005.7

Design of a high-speed optical interconnect for scalable shared-memory multiprocessors

Avinash Karanth Kodi, Ahmed Louri

Electrical and Computer Engineering

Research output: Contribution to journal › Article › peer-review

29 Scopus citations

Abstract

The architecture proposed here reduces remote memory access latency by increasing connectivity and maximizing channel availability for remote communication. It also provides efficient and fast unicast, multicast, and broadcast capabilities, using a combination of aggressively designed multiplexing techniques. Simulations show that this architecture provides excellent interconnect support for a highly scalable, high-bandwidth, low-latency network.

Original language	English (US)
Pages (from-to)	41-49
Number of pages	9
Journal	IEEE Micro
Volume	25
Issue number	1
DOIs	https://doi.org/10.1109/MM.2005.7
State	Published - Jan 2005

ASJC Scopus subject areas

Software
Hardware and Architecture
Electrical and Electronic Engineering

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10.1109/MM.2005.7

Cite this

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title = "Design of a high-speed optical interconnect for scalable shared-memory multiprocessors",

abstract = "The architecture proposed here reduces remote memory access latency by increasing connectivity and maximizing channel availability for remote communication. It also provides efficient and fast unicast, multicast, and broadcast capabilities, using a combination of aggressively designed multiplexing techniques. Simulations show that this architecture provides excellent interconnect support for a highly scalable, high-bandwidth, low-latency network.",

author = "Kodi, {Avinash Karanth} and Ahmed Louri",

note = "Funding Information: This research is supported by NSF grants CCR-0000518 and CCR-0309537 and an Intel grant.",

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Design of a high-speed optical interconnect for scalable shared-memory multiprocessors

Abstract

ASJC Scopus subject areas

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