DEC-NoC: An Approximate Framework Based on Dynamic Error Control with Applications to Energy-Efficient NoCs

Yuechen Chen; Md Farhadur Reza; Ahmed Louri

doi:10.1109/ICCD.2018.00078

DEC-NoC: An Approximate Framework Based on Dynamic Error Control with Applications to Energy-Efficient NoCs

Yuechen Chen
, Md Farhadur Reza
, Ahmed Louri

Electrical and Computer Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

22 Scopus citations

Abstract

Network-on-Chips (NoCs) have emerged as the standard on-chip communication fabrics for multi/many core systems and system on chips. However, as the number of cores on chip increases, so does power consumption. Recent studies have shown that NoC power consumption can reach up to 40% of the overall chip power [1]-[3]. Considerable research efforts have been deployed to significantly reduce NoC power consumption. In this paper, we build on approximate computing techniques and propose an approximate communication methodology called DEC-NoC for reducing NoC power consumption. The proposed DEC-NoC leverages applications' error tolerance and dynamically reduces the amount of error checking and correction in packet transmission, which results in a significant reduction in the number of retransmitted packets. The reduction in packet retransmission results in reduced power consumption.

Original language	English (US)
Title of host publication	Proceedings - 2018 IEEE 36th International Conference on Computer Design, ICCD 2018
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	480-487
Number of pages	8
ISBN (Electronic)	9781538684771
DOIs	https://doi.org/10.1109/ICCD.2018.00078
State	Published - Jan 16 2019
Event	36th International Conference on Computer Design, ICCD 2018 - Orlando, United States Duration: Oct 7 2018 → Oct 10 2018

Publication series

Name	Proceedings - 2018 IEEE 36th International Conference on Computer Design, ICCD 2018

Conference

Conference	36th International Conference on Computer Design, ICCD 2018
Country/Territory	United States
City	Orlando
Period	10/7/18 → 10/10/18

Keywords

Approximate Communication
Energy Consumption
Error Control
Networks-on-Chip(NoCs)

ASJC Scopus subject areas

Computer Networks and Communications
Hardware and Architecture
Safety, Risk, Reliability and Quality

Access to Document

10.1109/ICCD.2018.00078

Cite this

Chen, Y., Reza, M. F., & Louri, A. (2019). DEC-NoC: An Approximate Framework Based on Dynamic Error Control with Applications to Energy-Efficient NoCs. In Proceedings - 2018 IEEE 36th International Conference on Computer Design, ICCD 2018 (pp. 480-487). Article 8615728 (Proceedings - 2018 IEEE 36th International Conference on Computer Design, ICCD 2018). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ICCD.2018.00078

DEC-NoC: An Approximate Framework Based on Dynamic Error Control with Applications to Energy-Efficient NoCs. / Chen, Yuechen; Reza, Md Farhadur; Louri, Ahmed.
Proceedings - 2018 IEEE 36th International Conference on Computer Design, ICCD 2018. Institute of Electrical and Electronics Engineers Inc., 2019. p. 480-487 8615728 (Proceedings - 2018 IEEE 36th International Conference on Computer Design, ICCD 2018).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Chen, Y, Reza, MF & Louri, A 2019, DEC-NoC: An Approximate Framework Based on Dynamic Error Control with Applications to Energy-Efficient NoCs. in Proceedings - 2018 IEEE 36th International Conference on Computer Design, ICCD 2018., 8615728, Proceedings - 2018 IEEE 36th International Conference on Computer Design, ICCD 2018, Institute of Electrical and Electronics Engineers Inc., pp. 480-487, 36th International Conference on Computer Design, ICCD 2018, Orlando, United States, 10/7/18. https://doi.org/10.1109/ICCD.2018.00078

Chen Y, Reza MF, Louri A. DEC-NoC: An Approximate Framework Based on Dynamic Error Control with Applications to Energy-Efficient NoCs. In Proceedings - 2018 IEEE 36th International Conference on Computer Design, ICCD 2018. Institute of Electrical and Electronics Engineers Inc. 2019. p. 480-487. 8615728. (Proceedings - 2018 IEEE 36th International Conference on Computer Design, ICCD 2018). doi: 10.1109/ICCD.2018.00078

Chen, Yuechen ; Reza, Md Farhadur ; Louri, Ahmed. / DEC-NoC : An Approximate Framework Based on Dynamic Error Control with Applications to Energy-Efficient NoCs. Proceedings - 2018 IEEE 36th International Conference on Computer Design, ICCD 2018. Institute of Electrical and Electronics Engineers Inc., 2019. pp. 480-487 (Proceedings - 2018 IEEE 36th International Conference on Computer Design, ICCD 2018).

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abstract = "Network-on-Chips (NoCs) have emerged as the standard on-chip communication fabrics for multi/many core systems and system on chips. However, as the number of cores on chip increases, so does power consumption. Recent studies have shown that NoC power consumption can reach up to 40\% of the overall chip power [1]-[3]. Considerable research efforts have been deployed to significantly reduce NoC power consumption. In this paper, we build on approximate computing techniques and propose an approximate communication methodology called DEC-NoC for reducing NoC power consumption. The proposed DEC-NoC leverages applications' error tolerance and dynamically reduces the amount of error checking and correction in packet transmission, which results in a significant reduction in the number of retransmitted packets. The reduction in packet retransmission results in reduced power consumption.",

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N2 - Network-on-Chips (NoCs) have emerged as the standard on-chip communication fabrics for multi/many core systems and system on chips. However, as the number of cores on chip increases, so does power consumption. Recent studies have shown that NoC power consumption can reach up to 40% of the overall chip power [1]-[3]. Considerable research efforts have been deployed to significantly reduce NoC power consumption. In this paper, we build on approximate computing techniques and propose an approximate communication methodology called DEC-NoC for reducing NoC power consumption. The proposed DEC-NoC leverages applications' error tolerance and dynamically reduces the amount of error checking and correction in packet transmission, which results in a significant reduction in the number of retransmitted packets. The reduction in packet retransmission results in reduced power consumption.

AB - Network-on-Chips (NoCs) have emerged as the standard on-chip communication fabrics for multi/many core systems and system on chips. However, as the number of cores on chip increases, so does power consumption. Recent studies have shown that NoC power consumption can reach up to 40% of the overall chip power [1]-[3]. Considerable research efforts have been deployed to significantly reduce NoC power consumption. In this paper, we build on approximate computing techniques and propose an approximate communication methodology called DEC-NoC for reducing NoC power consumption. The proposed DEC-NoC leverages applications' error tolerance and dynamically reduces the amount of error checking and correction in packet transmission, which results in a significant reduction in the number of retransmitted packets. The reduction in packet retransmission results in reduced power consumption.

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DEC-NoC: An Approximate Framework Based on Dynamic Error Control with Applications to Energy-Efficient NoCs

Abstract

Publication series

Conference

Keywords

ASJC Scopus subject areas

Access to Document

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