A crossbar switch backplane design (Bus Switch Backplane) based on TI's crossbar switch chip is described. This backplane holds a maximum of 16 modules and allows simultaneous communications between up to 8 pairs of modules. The aggregate data transfer rate on the backplane is 160 Mbyte/ sec. The Bus Switch Backplane is an essential part of the ACP Multi Array Processor, a supercomputer for site oriented problems. The first application of this machine is in Lattice Gauge Theory calculations. The Bus Switch Backplane also finds ready application in data acquisition schemes based on the ACP multi-microprocessor system.
ASJC Scopus subject areas
- Nuclear and High Energy Physics
- Nuclear Energy and Engineering
- Electrical and Electronic Engineering