Buried oxide densification for low power, low voltage CMOS applications

L. P. Allen; M. J. Anc; J. Jiao; B. Guss; S. Seraphin; S. T. Liu; W. Jenkins

Buried oxide densification for low power, low voltage CMOS applications

L. P. Allen, M. J. Anc, J. Jiao, B. Guss, S. Seraphin, S. T. Liu, W. Jenkins

Research output: Contribution to conference › Paper › peer-review

Abstract

The properties of 120 nm BOX (buried oxide) and 360 nm SIMOX (separation by implantation of oxygen) were examined as a function of anneal ramp rate and temperature. The slower ramp rate (1 °C/min) contributed to the reduction of islands within the buried oxide layer. Both the slow ramp rate and high temperature (1350 °C) of anneal decreased the interface roughness of the Si/BOX interface in both materials. Results of the `island free' thin BOX layer showed a 30 V reduction in the threshold voltage shift upon irradiation to 1 Mrad with consistent gate oxide integrity.

Original language	English (US)
Pages	39-40
Number of pages	2
State	Published - 1998
Externally published	Yes
Event	Proceedings of the 1998 IEEE International SOI Conference - Stuart, FL, USA Duration: Oct 5 1998 → Oct 8 1998

Other

Other	Proceedings of the 1998 IEEE International SOI Conference
City	Stuart, FL, USA
Period	10/5/98 → 10/8/98

ASJC Scopus subject areas

Electronic, Optical and Magnetic Materials
Electrical and Electronic Engineering

Cite this

@conference{500aa66ce26e4976ae5ab24dcba4649d,

title = "Buried oxide densification for low power, low voltage CMOS applications",

abstract = "The properties of 120 nm BOX (buried oxide) and 360 nm SIMOX (separation by implantation of oxygen) were examined as a function of anneal ramp rate and temperature. The slower ramp rate (1 °C/min) contributed to the reduction of islands within the buried oxide layer. Both the slow ramp rate and high temperature (1350 °C) of anneal decreased the interface roughness of the Si/BOX interface in both materials. Results of the `island free' thin BOX layer showed a 30 V reduction in the threshold voltage shift upon irradiation to 1 Mrad with consistent gate oxide integrity.",

author = "Allen, {L. P.} and Anc, {M. J.} and J. Jiao and B. Guss and S. Seraphin and Liu, {S. T.} and W. Jenkins",

year = "1998",

language = "English (US)",

pages = "39--40",

note = "Proceedings of the 1998 IEEE International SOI Conference ; Conference date: 05-10-1998 Through 08-10-1998",

}

TY - CONF

T1 - Buried oxide densification for low power, low voltage CMOS applications

AU - Allen, L. P.

AU - Anc, M. J.

AU - Jiao, J.

AU - Guss, B.

AU - Seraphin, S.

AU - Liu, S. T.

AU - Jenkins, W.

PY - 1998

Y1 - 1998

N2 - The properties of 120 nm BOX (buried oxide) and 360 nm SIMOX (separation by implantation of oxygen) were examined as a function of anneal ramp rate and temperature. The slower ramp rate (1 °C/min) contributed to the reduction of islands within the buried oxide layer. Both the slow ramp rate and high temperature (1350 °C) of anneal decreased the interface roughness of the Si/BOX interface in both materials. Results of the `island free' thin BOX layer showed a 30 V reduction in the threshold voltage shift upon irradiation to 1 Mrad with consistent gate oxide integrity.

AB - The properties of 120 nm BOX (buried oxide) and 360 nm SIMOX (separation by implantation of oxygen) were examined as a function of anneal ramp rate and temperature. The slower ramp rate (1 °C/min) contributed to the reduction of islands within the buried oxide layer. Both the slow ramp rate and high temperature (1350 °C) of anneal decreased the interface roughness of the Si/BOX interface in both materials. Results of the `island free' thin BOX layer showed a 30 V reduction in the threshold voltage shift upon irradiation to 1 Mrad with consistent gate oxide integrity.

UR - http://www.scopus.com/inward/record.url?scp=0032317858&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0032317858&partnerID=8YFLogxK

M3 - Paper

AN - SCOPUS:0032317858

SP - 39

EP - 40

T2 - Proceedings of the 1998 IEEE International SOI Conference

Y2 - 5 October 1998 through 8 October 1998

ER -

Buried oxide densification for low power, low voltage CMOS applications

Abstract

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ASJC Scopus subject areas

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