Bit-by-bit pipelined and hybrid-grained 2d architecture for motion estimation of H.264/AVC

Engineering

• Motion Estimation 100%
• Block Size 66%
• Processing Element 33%
• Application Specific Integrated Circuit 33%
• Hardware Overhead 33%
• Absolute Difference 33%
• Adders 33%

Keyphrases

• Conventional Adder 33%
• Sum of Absolute Difference 33%
• Parallel Sum 33%
• Serial Hybrid 33%
• Bit-serial Architecture 33%
• Variable Block Size 33%
• Most Significant Bit 33%
• Video Formats 33%

Computer Science

• Sum Of Absolute Difference 33%
• Serial Architecture 33%
• Most Significant Bit 33%