TY - GEN
T1 - Autonomic power and performance management of high-performance servers
AU - Khargharia, Bithika
AU - Hariri, Salim
AU - Kdouh, Wael
AU - Houri, Manal
AU - El-Rewini, Hesham
AU - Yousif, Mazin
PY - 2008
Y1 - 2008
N2 - With the increased complexity of platforms coupled with data centers' servers sprawl, power consumption is reaching unsustainable limits. Researchers have addressed data centers' power & performance management at different hierarchies going from server clusters to servers to individual components within the server. This paper presents a novel technique for autonomic power & performance management of a high-performance server platform that consists of multi-core processor and multi-rank memory subsystems. Both the processor and/or the memory subsystem are dynamically reconfigured (expanded or contracted) to suit the application resource requirements. The reconfigured platform creates the opportunity for power savings by transitioning any unused platform capacity (processor/memory) into low-power states for as long as the platform performance remains within given acceptable thresholds. The platform power expenditure is minimized subject to platform performance parameters, which is formulated as an optimization problem. Our experimental results show around 58.33% savings in power as compared to static power management techniques.
AB - With the increased complexity of platforms coupled with data centers' servers sprawl, power consumption is reaching unsustainable limits. Researchers have addressed data centers' power & performance management at different hierarchies going from server clusters to servers to individual components within the server. This paper presents a novel technique for autonomic power & performance management of a high-performance server platform that consists of multi-core processor and multi-rank memory subsystems. Both the processor and/or the memory subsystem are dynamically reconfigured (expanded or contracted) to suit the application resource requirements. The reconfigured platform creates the opportunity for power savings by transitioning any unused platform capacity (processor/memory) into low-power states for as long as the platform performance remains within given acceptable thresholds. The platform power expenditure is minimized subject to platform performance parameters, which is formulated as an optimization problem. Our experimental results show around 58.33% savings in power as compared to static power management techniques.
UR - http://www.scopus.com/inward/record.url?scp=51049093808&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=51049093808&partnerID=8YFLogxK
U2 - 10.1109/IPDPS.2008.4536418
DO - 10.1109/IPDPS.2008.4536418
M3 - Conference contribution
AN - SCOPUS:51049093808
SN - 9781424416943
T3 - IPDPS Miami 2008 - Proceedings of the 22nd IEEE International Parallel and Distributed Processing Symposium, Program and CD-ROM
BT - IPDPS Miami 2008 - Proceedings of the 22nd IEEE International Parallel and Distributed Processing Symposium, Program and CD-ROM
T2 - IPDPS 2008 - 22nd IEEE International Parallel and Distributed Processing Symposium
Y2 - 14 April 2008 through 18 April 2008
ER -