TY - GEN
T1 - Automatic extraction of requirements from state-based hardware designs for runtime verification
AU - Seo, Minjun
AU - Lysecky, Roman
N1 - Publisher Copyright:
© 2019 ACM.
PY - 2019/5/13
Y1 - 2019/5/13
N2 - Runtime monitoring and verification enables a system to monitor itself and ensure system requirements are met even in the presence of dynamic environments. For hardware, state-based models are widely used, but verifying the correctness between the state-based model and hardware implementation is time-consuming and difficult. This paper presents a novel method for extracting hardware verification requirements from state-based hardware models to construct a hierarchical runtime monitoring graph that can be efficiently used at runtime to verify correctness.
AB - Runtime monitoring and verification enables a system to monitor itself and ensure system requirements are met even in the presence of dynamic environments. For hardware, state-based models are widely used, but verifying the correctness between the state-based model and hardware implementation is time-consuming and difficult. This paper presents a novel method for extracting hardware verification requirements from state-based hardware models to construct a hierarchical runtime monitoring graph that can be efficiently used at runtime to verify correctness.
KW - Formal requirements models
KW - Hardware-based observations
KW - Periodic statement machines
KW - Runtime verification
UR - http://www.scopus.com/inward/record.url?scp=85083244388&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85083244388&partnerID=8YFLogxK
U2 - 10.1145/3299874.3318021
DO - 10.1145/3299874.3318021
M3 - Conference contribution
AN - SCOPUS:85083244388
T3 - Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI
SP - 295
EP - 298
BT - GLSVLSI 2019 - Proceedings of the 2019 Great Lakes Symposium on VLSI
PB - Association for Computing Machinery
T2 - 29th Great Lakes Symposium on VLSI, GLSVLSI 2019
Y2 - 9 May 2019 through 11 May 2019
ER -