TY - GEN
T1 - Analysis of one-step majority logic decoding under correlated data-dependent gate failures
AU - Brkic, Srdan
AU - Ivanis, Predrag
AU - Vasic, Bane
PY - 2014
Y1 - 2014
N2 - In this paper we present analysis of one-step majority logic decoders made of unreliable components in the presence of data-dependent gate failures. Gate failures are modeled by a Markov chain, and based on the combinatorial representation of the fault configurations, a closed-form expression for the average bit error rate is derived for a regular LDPC code ensemble. Presented analysis framework is then used for obtaining upper bounds on decoding performance under timing errors.
AB - In this paper we present analysis of one-step majority logic decoders made of unreliable components in the presence of data-dependent gate failures. Gate failures are modeled by a Markov chain, and based on the combinatorial representation of the fault configurations, a closed-form expression for the average bit error rate is derived for a regular LDPC code ensemble. Presented analysis framework is then used for obtaining upper bounds on decoding performance under timing errors.
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U2 - 10.1109/ISIT.2014.6875304
DO - 10.1109/ISIT.2014.6875304
M3 - Conference contribution
AN - SCOPUS:84906545520
SN - 9781479951864
T3 - IEEE International Symposium on Information Theory - Proceedings
SP - 2599
EP - 2603
BT - 2014 IEEE International Symposium on Information Theory, ISIT 2014
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2014 IEEE International Symposium on Information Theory, ISIT 2014
Y2 - 29 June 2014 through 4 July 2014
ER -