Analysis and implementation of resource efficient probabilistic Gallager B LDPC decoder

Burak Unal; Fakhreddine Ghaffari; Ali Akoglu; David Declercq; Bane Vasic

doi:10.1109/NEWCAS.2017.8010173

Analysis and implementation of resource efficient probabilistic Gallager B LDPC decoder

Burak Unal, Fakhreddine Ghaffari, Ali Akoglu, David Declercq, Bane Vasic

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

6 Scopus citations

Abstract

Low-Density-Parity-Check (LDPC) codes have gained popularity in communication systems and standards due to their capacity-approaching error-correction performance. In this paper, we first expose the tradeoff between decoding performance and hardware performance across three LDPC hard-decision decoding algorithms: Gallager B (GaB), Gradient Descent Bit Flipping (GDBF), and Probabilistic Gradient Descent Bit Flipping (PGDBF). We show that GaB architecture delivers the best throughput while using fewest Field Programmable Gate Array (FPGA) resources, however performs the worst in terms of decoding performance. We then modify the GaB architecture, introduce a new Probabilistic stimulation function (PGaB), and achieve dramatic decoding performance improvement over the GaB, exceeding the performance of GDBF, without sacrificing its superior maximum operating frequency.

Original language	English (US)
Title of host publication	Proceedings - 2017 IEEE 15th International New Circuits and Systems Conference, NEWCAS 2017
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	333-336
Number of pages	4
ISBN (Electronic)	9781509049905
DOIs	https://doi.org/10.1109/NEWCAS.2017.8010173
State	Published - Aug 11 2017
Event	15th IEEE International New Circuits and Systems Conference, NEWCAS 2017 - Strasbourg, France Duration: Jun 25 2017 → Jun 28 2017

Publication series

Name	Proceedings - 2017 IEEE 15th International New Circuits and Systems Conference, NEWCAS 2017

Other

Other	15th IEEE International New Circuits and Systems Conference, NEWCAS 2017
Country/Territory	France
City	Strasbourg
Period	6/25/17 → 6/28/17

Keywords

FPGA architectures
High-performance probabibilistic hard-decision LDPC decoders

ASJC Scopus subject areas

Electrical and Electronic Engineering
Electronic, Optical and Magnetic Materials
Hardware and Architecture

Access to Document

10.1109/NEWCAS.2017.8010173

Cite this

Unal, B., Ghaffari, F., Akoglu, A., Declercq, D., & Vasic, B. (2017). Analysis and implementation of resource efficient probabilistic Gallager B LDPC decoder. In Proceedings - 2017 IEEE 15th International New Circuits and Systems Conference, NEWCAS 2017 (pp. 333-336). Article 8010173 (Proceedings - 2017 IEEE 15th International New Circuits and Systems Conference, NEWCAS 2017). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/NEWCAS.2017.8010173

Analysis and implementation of resource efficient probabilistic Gallager B LDPC decoder. / Unal, Burak; Ghaffari, Fakhreddine; Akoglu, Ali et al.
Proceedings - 2017 IEEE 15th International New Circuits and Systems Conference, NEWCAS 2017. Institute of Electrical and Electronics Engineers Inc., 2017. p. 333-336 8010173 (Proceedings - 2017 IEEE 15th International New Circuits and Systems Conference, NEWCAS 2017).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Unal, B, Ghaffari, F, Akoglu, A, Declercq, D & Vasic, B 2017, Analysis and implementation of resource efficient probabilistic Gallager B LDPC decoder. in Proceedings - 2017 IEEE 15th International New Circuits and Systems Conference, NEWCAS 2017., 8010173, Proceedings - 2017 IEEE 15th International New Circuits and Systems Conference, NEWCAS 2017, Institute of Electrical and Electronics Engineers Inc., pp. 333-336, 15th IEEE International New Circuits and Systems Conference, NEWCAS 2017, Strasbourg, France, 6/25/17. https://doi.org/10.1109/NEWCAS.2017.8010173

Unal B, Ghaffari F, Akoglu A, Declercq D, Vasic B. Analysis and implementation of resource efficient probabilistic Gallager B LDPC decoder. In Proceedings - 2017 IEEE 15th International New Circuits and Systems Conference, NEWCAS 2017. Institute of Electrical and Electronics Engineers Inc. 2017. p. 333-336. 8010173. (Proceedings - 2017 IEEE 15th International New Circuits and Systems Conference, NEWCAS 2017). doi: 10.1109/NEWCAS.2017.8010173

Unal, Burak ; Ghaffari, Fakhreddine ; Akoglu, Ali et al. / Analysis and implementation of resource efficient probabilistic Gallager B LDPC decoder. Proceedings - 2017 IEEE 15th International New Circuits and Systems Conference, NEWCAS 2017. Institute of Electrical and Electronics Engineers Inc., 2017. pp. 333-336 (Proceedings - 2017 IEEE 15th International New Circuits and Systems Conference, NEWCAS 2017).

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AB - Low-Density-Parity-Check (LDPC) codes have gained popularity in communication systems and standards due to their capacity-approaching error-correction performance. In this paper, we first expose the tradeoff between decoding performance and hardware performance across three LDPC hard-decision decoding algorithms: Gallager B (GaB), Gradient Descent Bit Flipping (GDBF), and Probabilistic Gradient Descent Bit Flipping (PGDBF). We show that GaB architecture delivers the best throughput while using fewest Field Programmable Gate Array (FPGA) resources, however performs the worst in terms of decoding performance. We then modify the GaB architecture, introduce a new Probabilistic stimulation function (PGaB), and achieve dramatic decoding performance improvement over the GaB, exceeding the performance of GDBF, without sacrificing its superior maximum operating frequency.

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Analysis and implementation of resource efficient probabilistic Gallager B LDPC decoder

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