Abstract
In this paper, we develop a theoretical framework for the analysis and design of fault-tolerant memory architectures. Our approach is a modification of the method developed by Taylor and refined by Kuznetsov. Taylor and Kuznetsov (TK) showed that memory systems have nonzero computational (storage) capacity, i.e., the redundancy necessary to ensure reliability grows asymptotically linearly with the memory size. The restoration phase in the TK method is based on low-density parity-check codes which can be decoded using low complexity decoders. The equivalence of the restoration phase in the TK method and faulty Gallager B algorithm enabled us to establish a theoretical framework for solving problems in reliable storage on unreliable media using the large body of knowledge in codes on graphs and iterative decoding gained in the past decade.
Original language | English (US) |
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Pages (from-to) | 2438-2446 |
Number of pages | 9 |
Journal | IEEE Transactions on Circuits and Systems I: Regular Papers |
Volume | 54 |
Issue number | 11 SPEC. ISS. |
DOIs | |
State | Published - 2007 |
Keywords
- Faulty gates
- Low-density parity-check (LDPC) codes
- Message passing
- Reliable storage
ASJC Scopus subject areas
- Electrical and Electronic Engineering
- Hardware and Architecture