An Embedded System's Design Verification Using Object-Oriented Simulation

The ability for the embedded system designer model and simulate proposed designs prior to implementation is increasingly valuable in today's competitive market place. Simulation-based design is a methodology that uses the vir tual prototype as a means of producing consis tent and reduced design time. This paper presents this approach in the context of an auto motive embedded system application. Struc tural models are used to capture design knowl edge and define the space of possible design alternatives. The Discrete Event Specification (DEVS) formalism is used to develop behavioral models which can be simulated. Results are ob tained through experimental frames which are used to define the scope of simulation. These re sults allow the designers to confirm that the proposed design solution meets the system re quirements and constraints.