An Analysis Tool Set for Reconfigurable Media Processing

A. Dasu; A. Akoglu; S. Panchanathan

An Analysis Tool Set for Reconfigurable Media Processing

A. Dasu, A. Akoglu, S. Panchanathan

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

Existing media processing solutions such as general purpose processors with media acceleration support or application specific hardware units fail to satisfy the constraints of low power, less silicon area and varying computing demands of the applications. Our research effort aids the design of a dynamically reconfigurable processor through the use of a set of analysis and design tools. This paper describes a part of the first of a set of three tools. These are intended to help hardware and system designers arrive at optimal hardware software co-designs for applications of a given class. The reconfigurable computing devices thus designed, will be able to adapt the underlying hardware dynamically in response to changes in the input data or processing environment.

Original language	English (US)
Title of host publication	Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms, ERSA 03
Editors	T.P. Plaks, T.P. Plaks
Pages	292-295
Number of pages	4
State	Published - 2003
Externally published	Yes
Event	Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms, ERSA'03 - Las Vegas, NV, United States Duration: Jun 23 2003 → Jun 26 2003

Publication series

Name	Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms

Other

Other	Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms, ERSA'03
Country/Territory	United States
City	Las Vegas, NV
Period	6/23/03 → 6/26/03

Keywords

Control flow analysis
Dynamically reconfigurable

ASJC Scopus subject areas

General Computer Science
Theoretical Computer Science

Cite this

Dasu, A., Akoglu, A., & Panchanathan, S. (2003). An Analysis Tool Set for Reconfigurable Media Processing. In T. P. Plaks, & T. P. Plaks (Eds.), Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms, ERSA 03 (pp. 292-295). (Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms).

An Analysis Tool Set for Reconfigurable Media Processing. / Dasu, A.; Akoglu, A.; Panchanathan, S.
Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms, ERSA 03. ed. / T.P. Plaks; T.P. Plaks. 2003. p. 292-295 (Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Dasu, A, Akoglu, A & Panchanathan, S 2003, An Analysis Tool Set for Reconfigurable Media Processing. in TP Plaks & TP Plaks (eds), Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms, ERSA 03. Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms, pp. 292-295, Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms, ERSA'03, Las Vegas, NV, United States, 6/23/03.

@inproceedings{afd778870b694239880ab17a46d1a05f,

title = "An Analysis Tool Set for Reconfigurable Media Processing",

abstract = "Existing media processing solutions such as general purpose processors with media acceleration support or application specific hardware units fail to satisfy the constraints of low power, less silicon area and varying computing demands of the applications. Our research effort aids the design of a dynamically reconfigurable processor through the use of a set of analysis and design tools. This paper describes a part of the first of a set of three tools. These are intended to help hardware and system designers arrive at optimal hardware software co-designs for applications of a given class. The reconfigurable computing devices thus designed, will be able to adapt the underlying hardware dynamically in response to changes in the input data or processing environment.",

keywords = "Control flow analysis, Dynamically reconfigurable",

author = "A. Dasu and A. Akoglu and S. Panchanathan",

year = "2003",

language = "English (US)",

isbn = "193241505X",

series = "Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms",

pages = "292--295",

editor = "T.P. Plaks and T.P. Plaks",

booktitle = "Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms, ERSA 03",

note = "Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms, ERSA'03 ; Conference date: 23-06-2003 Through 26-06-2003",

}

TY - GEN

T1 - An Analysis Tool Set for Reconfigurable Media Processing

AU - Dasu, A.

AU - Akoglu, A.

AU - Panchanathan, S.

PY - 2003

Y1 - 2003

N2 - Existing media processing solutions such as general purpose processors with media acceleration support or application specific hardware units fail to satisfy the constraints of low power, less silicon area and varying computing demands of the applications. Our research effort aids the design of a dynamically reconfigurable processor through the use of a set of analysis and design tools. This paper describes a part of the first of a set of three tools. These are intended to help hardware and system designers arrive at optimal hardware software co-designs for applications of a given class. The reconfigurable computing devices thus designed, will be able to adapt the underlying hardware dynamically in response to changes in the input data or processing environment.

AB - Existing media processing solutions such as general purpose processors with media acceleration support or application specific hardware units fail to satisfy the constraints of low power, less silicon area and varying computing demands of the applications. Our research effort aids the design of a dynamically reconfigurable processor through the use of a set of analysis and design tools. This paper describes a part of the first of a set of three tools. These are intended to help hardware and system designers arrive at optimal hardware software co-designs for applications of a given class. The reconfigurable computing devices thus designed, will be able to adapt the underlying hardware dynamically in response to changes in the input data or processing environment.

KW - Control flow analysis

KW - Dynamically reconfigurable

UR - http://www.scopus.com/inward/record.url?scp=1642387086&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=1642387086&partnerID=8YFLogxK

M3 - Conference contribution

AN - SCOPUS:1642387086

SN - 193241505X

SN - 9781932415056

T3 - Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms

SP - 292

EP - 295

BT - Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms, ERSA 03

A2 - Plaks, T.P.

T2 - Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms, ERSA'03

Y2 - 23 June 2003 through 26 June 2003

ER -

An Analysis Tool Set for Reconfigurable Media Processing

Abstract

Publication series

Other

Keywords

ASJC Scopus subject areas

Other files and links

Fingerprint

Cite this