An analysis of potential 450mm CMP tool scaling questions

Leonard Borucki, Ara Philipossian, Michael Goldstein

Research output: Contribution to specialist publicationArticle

6 Scopus citations


Since the invention of the integrated circuit, microchips have been fabricated on progressively larger silicon wafers to take advantage of the economies that can be realized from being able to process more die simultaneously. In the early 1970s, a 50mm wafer could hold about fifty 0.5 × 0.5cm dice. More than 36 times as many die of the same size can now be processed on a 300mm wafer. Even allowing for the greater cost of the larger wafer and the tools needed to process it, the growth in wafer area has historically been a significant factor in reducing the cost per die. This article discusses the considerations that arise with respect to chemical mechanical planarization (CMP) for 450mm wafer manufacturing.

Original languageEnglish (US)
Number of pages4
Specialist publicationSolid State Technology
StatePublished - Dec 2009

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Condensed Matter Physics
  • Electrical and Electronic Engineering
  • Materials Chemistry


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