Abstract
Substrate and waveguide cross talk models are presented for CMOS smart detectors arrays. A test chip of linear arrays using both p+n and np detectors has been designed and fabricated for characterization of substrate and waveguide cross talk. It is shown that both the substrate and waveguide models agree well with the measured cross talk. Techniques for reducing cross talk in CMOS detector arrays are also presented.
Original language | English (US) |
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Pages (from-to) | 102-107 |
Number of pages | 6 |
Journal | Proceedings of SPIE - The International Society for Optical Engineering |
Volume | 2291 |
DOIs | |
State | Published - Oct 21 1994 |
Externally published | Yes |
Event | Integrated Optics and Microstructures II 1994 - San Diego, United States Duration: Jul 24 1994 → Jul 29 1994 |
ASJC Scopus subject areas
- Electronic, Optical and Magnetic Materials
- Condensed Matter Physics
- Computer Science Applications
- Applied Mathematics
- Electrical and Electronic Engineering