A Hardware-based HEFT Scheduler Implementation for Dynamic Workloads on Heterogeneous SoCs

Alexander Fusco, Sahil Hassan, Joshua Mack, Ali Akoglu

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Scopus citations


Non-uniform performance and power consumption across the processing elements (PEs) of heterogeneous SoCs increase the computation complexity of the task scheduling problem compared to homogeneous architectures. Latency of a software-based scheduler with the increased heterogeneity level in terms of number and types of PEs creates the necessity of deploying a scheduler as an overlay processor in hardware to be able to make scheduling decisions rapidly and enable deployment of real-life applications on heterogeneous SoCs. In this study we present the design trade-offs involved for implementing and deploying the runtime variant of the heterogeneous earliest finish time algorithm (HEFTRT) on the FPGA. We conduct performance evaluations on an SoC configuration emulated over the Xilinx Zynq ZCU102 platform. In a runtime environment we demonstrate hardware-based HEFTRT's ability to make scheduling decisions with 9.144 ns latency on average, process 26.7% more tasks per second compared to its software counterpart, and reduce the scheduling latency by up to a factor of 183 based on workloads composed of a mixture of dynamically ×arriving real-life signal processing applications.

Original languageEnglish (US)
Title of host publicationProceedings of the 2022 IFIP/IEEE 30th International Conference on Very Large Scale Integration, VLSI-SoC 2022
PublisherIEEE Computer Society
ISBN (Electronic)9781665490054
StatePublished - 2022
Event30th IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2022 - Patras, Greece
Duration: Oct 3 2022Oct 5 2022

Publication series

NameIEEE/IFIP International Conference on VLSI and System-on-Chip, VLSI-SoC
ISSN (Print)2324-8432
ISSN (Electronic)2324-8440


Conference30th IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2022


  • FPGA
  • Scheduling
  • hardware emulation
  • multiprocessor SoC
  • system on chip

ASJC Scopus subject areas

  • Hardware and Architecture
  • Software
  • Electrical and Electronic Engineering

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