3D printed electronics with high performance, multi-layered electrical interconnect

2-D printed electronics have been the focus of intense research for the past two decades primarily focused on implementing electrical interconnect by dispensing conductive binder-based inks. More recently, traditional printed electronics processes have been leveraged within 3-D printed structures where components and interconnect are introduced during fabrication interruptions. The dielectric performance of 3-D printed materials compares well with traditional printed circuit board (PCB) dielectrics but one remaining challenge is the low conductivity of printed ink traces. The performance degradation is due to curing temperature limits imposed by the properties of the polymer substrates. Thermoplastics, such as ULTEM, can maintain form at over 200 ^◦C, but production ink curing processes require 850 ^◦C to provide an appropriate conductivity. Previous reports have described submerging wires with selective energy within a thermoplastic substrate upon which 3-D printing can continue uninhibited. As copper wires have the same conductivity as PCBs and can be implemented in a wide range of cross-sectional areas, 3-D printed electronics are now in a position to transform the electronics industry. This paper describes an inter-layer process to insert metal connection between layers—allowing for improved routing density and leveraging the geometries brought to bear by 3-D printing. Minimum placement distance between these 3-D printed vias was initially 1.5 mm, and the vias can connect layers separated by as much as 2.8 mm in the vertical build direction (z-axis). As the number of wires layers that can be fabricated is not as limited as traditional board lamination, complex routing can be realized within mass customized, arbitrary shapes.