100 Gbit/s authenticated encryption based on quantum key distribution

Michael Muehlberghuber; Christoph Keller; Norbert Felber; Christian Pendl

doi:10.1109/VLSI-SoC.2012.6379017

100 Gbit/s authenticated encryption based on quantum key distribution

Michael Muehlberghuber, Christoph Keller, Norbert Felber, Christian Pendl

Mathematics

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

2 Scopus citations

Abstract

We propose a block-cipher-based hardware architecture for authenticated encryption (AE) applications supporting the Ethernet standard IEEE 802.3ba. Our main design goal was to achieve high throughput on FPGA platforms. Compared to previous works aiming at data rates beyond 100 Gbit/s, our design makes use of an alternative block cipher and an alternative mode of operation, namely Serpent and the offset codebook mode of operation, respectively. Using four cipher cores for the encryption part of the AE architecture, we achieve a throughput of 133 Gbit/s on an Altera Stratix IV FPGA. The design requires 30 kALMs and runs at a maximum clock frequency of 260 MHz. This represents, to the best of our knowledge, the fastest full implementation of an AE scheme on FPGAs to date.

Original language	English (US)
Title of host publication	20th IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2012 - Proceedings
Pages	123-128
Number of pages	6
DOIs	https://doi.org/10.1109/VLSI-SoC.2012.6379017
State	Published - 2012
Event	20th IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2012 - Santa Cruz, CA, United States Duration: Oct 7 2012 → Oct 10 2012

Publication series

Name	20th IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2012 - Proceedings

Conference

Conference	20th IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2012
Country/Territory	United States
City	Santa Cruz, CA
Period	10/7/12 → 10/10/12

Keywords

AES
Authenticated encryption
FPGA
GCM
High-throughput architecture
OCB
Pipelining
Serpent

ASJC Scopus subject areas

Hardware and Architecture

Access to Document

10.1109/VLSI-SoC.2012.6379017

Cite this

Muehlberghuber, M., Keller, C., Felber, N., & Pendl, C. (2012). 100 Gbit/s authenticated encryption based on quantum key distribution. In 20th IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2012 - Proceedings (pp. 123-128). [6379017] (20th IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2012 - Proceedings). https://doi.org/10.1109/VLSI-SoC.2012.6379017

100 Gbit/s authenticated encryption based on quantum key distribution. / Muehlberghuber, Michael; Keller, Christoph; Felber, Norbert et al.

20th IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2012 - Proceedings. 2012. p. 123-128 6379017 (20th IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2012 - Proceedings).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Muehlberghuber, M, Keller, C, Felber, N & Pendl, C 2012, 100 Gbit/s authenticated encryption based on quantum key distribution. in 20th IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2012 - Proceedings., 6379017, 20th IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2012 - Proceedings, pp. 123-128, 20th IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2012, Santa Cruz, CA, United States, 10/7/12. https://doi.org/10.1109/VLSI-SoC.2012.6379017

Muehlberghuber M, Keller C, Felber N, Pendl C. 100 Gbit/s authenticated encryption based on quantum key distribution. In 20th IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2012 - Proceedings. 2012. p. 123-128. 6379017. (20th IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2012 - Proceedings). doi: 10.1109/VLSI-SoC.2012.6379017

@inproceedings{cca6d8a16e4e498db757fb81ec53b7ba,

title = "100 Gbit/s authenticated encryption based on quantum key distribution",

abstract = "We propose a block-cipher-based hardware architecture for authenticated encryption (AE) applications supporting the Ethernet standard IEEE 802.3ba. Our main design goal was to achieve high throughput on FPGA platforms. Compared to previous works aiming at data rates beyond 100 Gbit/s, our design makes use of an alternative block cipher and an alternative mode of operation, namely Serpent and the offset codebook mode of operation, respectively. Using four cipher cores for the encryption part of the AE architecture, we achieve a throughput of 133 Gbit/s on an Altera Stratix IV FPGA. The design requires 30 kALMs and runs at a maximum clock frequency of 260 MHz. This represents, to the best of our knowledge, the fastest full implementation of an AE scheme on FPGAs to date.",

keywords = "AES, Authenticated encryption, FPGA, GCM, High-throughput architecture, OCB, Pipelining, Serpent",

author = "Michael Muehlberghuber and Christoph Keller and Norbert Felber and Christian Pendl",

year = "2012",

doi = "10.1109/VLSI-SoC.2012.6379017",

language = "English (US)",

isbn = "9781467326568",

series = "20th IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2012 - Proceedings",

pages = "123--128",

booktitle = "20th IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2012 - Proceedings",

note = "20th IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2012 ; Conference date: 07-10-2012 Through 10-10-2012",

}

TY - GEN

T1 - 100 Gbit/s authenticated encryption based on quantum key distribution

AU - Muehlberghuber, Michael

AU - Keller, Christoph

AU - Felber, Norbert

AU - Pendl, Christian

PY - 2012

Y1 - 2012

N2 - We propose a block-cipher-based hardware architecture for authenticated encryption (AE) applications supporting the Ethernet standard IEEE 802.3ba. Our main design goal was to achieve high throughput on FPGA platforms. Compared to previous works aiming at data rates beyond 100 Gbit/s, our design makes use of an alternative block cipher and an alternative mode of operation, namely Serpent and the offset codebook mode of operation, respectively. Using four cipher cores for the encryption part of the AE architecture, we achieve a throughput of 133 Gbit/s on an Altera Stratix IV FPGA. The design requires 30 kALMs and runs at a maximum clock frequency of 260 MHz. This represents, to the best of our knowledge, the fastest full implementation of an AE scheme on FPGAs to date.

AB - We propose a block-cipher-based hardware architecture for authenticated encryption (AE) applications supporting the Ethernet standard IEEE 802.3ba. Our main design goal was to achieve high throughput on FPGA platforms. Compared to previous works aiming at data rates beyond 100 Gbit/s, our design makes use of an alternative block cipher and an alternative mode of operation, namely Serpent and the offset codebook mode of operation, respectively. Using four cipher cores for the encryption part of the AE architecture, we achieve a throughput of 133 Gbit/s on an Altera Stratix IV FPGA. The design requires 30 kALMs and runs at a maximum clock frequency of 260 MHz. This represents, to the best of our knowledge, the fastest full implementation of an AE scheme on FPGAs to date.

KW - AES

KW - Authenticated encryption

KW - FPGA

KW - GCM

KW - High-throughput architecture

KW - OCB

KW - Pipelining

KW - Serpent

UR - http://www.scopus.com/inward/record.url?scp=84872188562&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84872188562&partnerID=8YFLogxK

U2 - 10.1109/VLSI-SoC.2012.6379017

DO - 10.1109/VLSI-SoC.2012.6379017

M3 - Conference contribution

AN - SCOPUS:84872188562

SN - 9781467326568

T3 - 20th IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2012 - Proceedings

SP - 123

EP - 128

BT - 20th IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2012 - Proceedings

T2 - 20th IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2012

Y2 - 7 October 2012 through 10 October 2012

ER -

100 Gbit/s authenticated encryption based on quantum key distribution

Abstract

Publication series

Conference

Keywords

ASJC Scopus subject areas

Access to Document

Other files and links

Fingerprint

Cite this